/*
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* Distributed under the Boost Software License, Version 1.0.
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* (See accompanying file LICENSE_1_0.txt or copy at
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* http://www.boost.org/LICENSE_1_0.txt)
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*
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* Copyright (c) 2010 Helge Bahmann
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* Copyright (c) 2013 Tim Blechmann
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* Copyright (c) 2014 Andrey Semashev
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*/
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/*!
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* \file atomic/detail/core_arch_ops_gcc_sparc.hpp
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*
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* This header contains implementation of the \c core_arch_operations template.
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*/
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#ifndef BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
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#define BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
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#include <cstddef>
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#include <boost/memory_order.hpp>
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#include <boost/atomic/detail/config.hpp>
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#include <boost/atomic/detail/storage_traits.hpp>
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#include <boost/atomic/detail/core_arch_operations_fwd.hpp>
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#include <boost/atomic/detail/core_ops_cas_based.hpp>
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#include <boost/atomic/detail/cas_based_exchange.hpp>
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#include <boost/atomic/detail/extending_cas_based_arithmetic.hpp>
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#include <boost/atomic/detail/header.hpp>
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#ifdef BOOST_HAS_PRAGMA_ONCE
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#pragma once
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#endif
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namespace boost {
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namespace atomics {
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namespace detail {
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struct gcc_sparc_cas_base
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{
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static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = true;
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static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
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static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
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{
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if (order == memory_order_seq_cst)
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__asm__ __volatile__ ("membar #Sync" ::: "memory");
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else if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
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__asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
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}
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static BOOST_FORCEINLINE void fence_after(memory_order order) BOOST_NOEXCEPT
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{
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if (order == memory_order_seq_cst)
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__asm__ __volatile__ ("membar #Sync" ::: "memory");
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else if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_consume) | static_cast< unsigned int >(memory_order_acquire))) != 0u)
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__asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
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}
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static BOOST_FORCEINLINE void fence_after_store(memory_order order) BOOST_NOEXCEPT
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{
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if (order == memory_order_seq_cst)
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__asm__ __volatile__ ("membar #Sync" ::: "memory");
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}
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};
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template< bool Signed, bool Interprocess >
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struct gcc_sparc_cas32 :
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public gcc_sparc_cas_base
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{
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typedef typename storage_traits< 4u >::type storage_type;
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static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
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static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 4u;
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static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
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static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
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static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
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{
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fence_before(order);
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storage = v;
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fence_after_store(order);
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}
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static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
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{
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storage_type v = storage;
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fence_after(order);
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return v;
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}
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static BOOST_FORCEINLINE bool compare_exchange_strong(
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storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
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{
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fence_before(success_order);
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storage_type previous = expected;
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__asm__ __volatile__
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(
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"cas [%1], %2, %0"
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: "+r" (desired)
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: "r" (&storage), "r" (previous)
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: "memory"
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);
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const bool success = (desired == previous);
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if (success)
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fence_after(success_order);
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else
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fence_after(failure_order);
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expected = desired;
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return success;
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}
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static BOOST_FORCEINLINE bool compare_exchange_weak(
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storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
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{
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return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
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}
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static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
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{
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fence_before(order);
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__asm__ __volatile__
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(
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"swap [%1], %0"
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: "+r" (v)
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: "r" (&storage)
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: "memory"
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);
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fence_after(order);
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return v;
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}
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};
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template< bool Signed, bool Interprocess >
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struct core_arch_operations< 4u, Signed, Interprocess > :
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public core_operations_cas_based< gcc_sparc_cas32< Signed, Interprocess > >
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{
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};
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template< bool Signed, bool Interprocess >
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struct core_arch_operations< 1u, Signed, Interprocess > :
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public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 1u, Signed >
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{
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};
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template< bool Signed, bool Interprocess >
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struct core_arch_operations< 2u, Signed, Interprocess > :
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public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 2u, Signed >
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{
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};
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template< bool Signed, bool Interprocess >
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struct gcc_sparc_cas64 :
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public gcc_sparc_cas_base
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{
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typedef typename storage_traits< 8u >::type storage_type;
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static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
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static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 8u;
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static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
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static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
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static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
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{
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fence_before(order);
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storage = v;
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fence_after_store(order);
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}
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static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
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{
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storage_type v = storage;
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fence_after(order);
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return v;
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}
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static BOOST_FORCEINLINE bool compare_exchange_strong(
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storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
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{
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fence_before(success_order);
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storage_type previous = expected;
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__asm__ __volatile__
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(
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"casx [%1], %2, %0"
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: "+r" (desired)
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: "r" (&storage), "r" (previous)
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: "memory"
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);
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const bool success = (desired == previous);
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if (success)
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fence_after(success_order);
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else
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fence_after(failure_order);
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expected = desired;
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return success;
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}
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static BOOST_FORCEINLINE bool compare_exchange_weak(
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storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
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{
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return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
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}
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};
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template< bool Signed, bool Interprocess >
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struct core_arch_operations< 8u, Signed, Interprocess > :
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public core_operations_cas_based< cas_based_exchange< gcc_sparc_cas64< Signed, Interprocess > > >
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{
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};
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} // namespace detail
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} // namespace atomics
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} // namespace boost
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#include <boost/atomic/detail/footer.hpp>
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#endif // BOOST_ATOMIC_DETAIL_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
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