/*
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* Distributed under the Boost Software License, Version 1.0.
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* (See accompanying file LICENSE_1_0.txt or copy at
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* http://www.boost.org/LICENSE_1_0.txt)
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*
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* Copyright (c) 2020 Andrey Semashev
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*/
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/*!
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* \file atomic/detail/fence_arch_ops_gcc_arm.hpp
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*
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* This header contains implementation of the \c fence_arch_operations struct.
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*/
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#ifndef BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_ARM_HPP_INCLUDED_
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#define BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_ARM_HPP_INCLUDED_
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#include <boost/cstdint.hpp>
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#include <boost/memory_order.hpp>
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#include <boost/atomic/detail/config.hpp>
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#include <boost/atomic/detail/capabilities.hpp>
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#include <boost/atomic/detail/gcc_arm_asm_common.hpp>
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#include <boost/atomic/detail/header.hpp>
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#ifdef BOOST_HAS_PRAGMA_ONCE
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#pragma once
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#endif
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namespace boost {
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namespace atomics {
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namespace detail {
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//! Fence operations for legacy ARM
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struct fence_arch_operations_gcc_arm
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{
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static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
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{
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if (order != memory_order_relaxed)
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hardware_full_fence();
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}
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static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
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{
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if (order != memory_order_relaxed)
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__asm__ __volatile__ ("" ::: "memory");
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}
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static BOOST_FORCEINLINE void hardware_full_fence() BOOST_NOEXCEPT
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{
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// A memory barrier is effected using a "co-processor 15" instruction,
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// though a separate assembler mnemonic is available for it in v7.
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#if defined(BOOST_ATOMIC_DETAIL_ARM_HAS_DMB)
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// Older binutils (supposedly, older than 2.21.1) didn't support symbolic or numeric arguments of the "dmb" instruction such as "ish" or "#11".
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// As a workaround we have to inject encoded bytes of the instruction. There are two encodings for the instruction: ARM and Thumb. See ARM Architecture Reference Manual, A8.8.43.
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// Since we cannot detect binutils version at compile time, we'll have to always use this hack.
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__asm__ __volatile__
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(
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#if defined(__thumb2__)
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".short 0xF3BF, 0x8F5B\n\t" // dmb ish
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#else
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".word 0xF57FF05B\n\t" // dmb ish
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#endif
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:
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:
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: "memory"
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);
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#else
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uint32_t tmp;
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__asm__ __volatile__
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(
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BOOST_ATOMIC_DETAIL_ARM_ASM_START(%0)
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"mcr p15, 0, r0, c7, c10, 5\n\t"
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BOOST_ATOMIC_DETAIL_ARM_ASM_END(%0)
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: "=&l" (tmp)
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:
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: "memory"
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);
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#endif
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}
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};
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typedef fence_arch_operations_gcc_arm fence_arch_operations;
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} // namespace detail
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} // namespace atomics
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} // namespace boost
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#include <boost/atomic/detail/footer.hpp>
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#endif // BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_ARM_HPP_INCLUDED_
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