/*
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* Distributed under the Boost Software License, Version 1.0.
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* (See accompanying file LICENSE_1_0.txt or copy at
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* http://www.boost.org/LICENSE_1_0.txt)
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*
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* Copyright (c) 2020 Andrey Semashev
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*/
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/*!
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* \file atomic/detail/fence_arch_ops_msvc_x86.hpp
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*
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* This header contains implementation of the \c fence_arch_operations struct.
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*/
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#ifndef BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_MSVC_X86_HPP_INCLUDED_
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#define BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_MSVC_X86_HPP_INCLUDED_
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#include <boost/cstdint.hpp>
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#include <boost/memory_order.hpp>
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#include <boost/atomic/detail/config.hpp>
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#include <boost/atomic/detail/interlocked.hpp>
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#include <boost/atomic/detail/ops_msvc_common.hpp>
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#include <boost/atomic/detail/header.hpp>
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#ifdef BOOST_HAS_PRAGMA_ONCE
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#pragma once
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#endif
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namespace boost {
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namespace atomics {
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namespace detail {
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//! Fence operations for x86
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struct fence_arch_operations_msvc_x86
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{
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static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
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{
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if (order == memory_order_seq_cst)
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{
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// See the comment in fence_ops_gcc_x86.hpp as to why we're not using mfence here.
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// We're not using __faststorefence() here because it generates an atomic operation
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// on [rsp]/[esp] location, which may alias valid data and cause false data dependency.
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boost::uint32_t dummy;
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BOOST_ATOMIC_INTERLOCKED_INCREMENT(&dummy);
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}
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else if (order != memory_order_relaxed)
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{
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BOOST_ATOMIC_DETAIL_COMPILER_BARRIER();
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}
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}
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static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
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{
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if (order != memory_order_relaxed)
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BOOST_ATOMIC_DETAIL_COMPILER_BARRIER();
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}
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};
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typedef fence_arch_operations_msvc_x86 fence_arch_operations;
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} // namespace detail
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} // namespace atomics
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} // namespace boost
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#include <boost/atomic/detail/footer.hpp>
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#endif // BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_MSVC_X86_HPP_INCLUDED_
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