#ifndef CAFFE2_OPERATORS_CONV_POOL_OP_BASE_H_
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#define CAFFE2_OPERATORS_CONV_POOL_OP_BASE_H_
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#include <algorithm>
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#include <vector>
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#include "caffe2/core/context.h"
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#include "caffe2/core/logging.h"
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#include "caffe2/core/operator.h"
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#include "caffe2/proto/caffe2_legacy.pb.h"
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#include "caffe2/utils/math.h"
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// This macro is here just to allow us to experiment with padding values that
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// determines, when we have an odd number of pads, which side gets the one
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// additional pad value, the head side, or the tail side. Setting it to false
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// will enable the TensorFlow behavior, and setting it to true will enable
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// a behavior more consistent with Caffe and CuDNN.
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// This only affects the case when you set legacy pad to VALID or SAME. The
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// behavior inherits from the early designs of Google's CNN implementation,
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// where padding values are implicitly calculated instead of explicitly
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// specified. This is still the case with TensorFlow. Many frameworks have
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// followed a slightly different approach of explicitly giving padding values,
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// in which case the value of this constant value does not matter.
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const bool CAFFE2_PAD_HEAD_MORE = false;
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namespace caffe2 {
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template <class Context>
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class ConvPoolOpBase : public Operator<Context> {
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public:
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USE_OPERATOR_CONTEXT_FUNCTIONS;
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explicit ConvPoolOpBase(const OperatorDef& operator_def, Workspace* ws)
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: Operator<Context>(operator_def, ws),
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legacy_pad_(
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static_cast<LegacyPadding>(this->template GetSingleArgument<int>(
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"legacy_pad",
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LegacyPadding::NOTSET))),
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global_pooling_(
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this->template GetSingleArgument<int>("global_pooling", 0)),
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kernel_(this->template GetRepeatedArgument<int>("kernels")),
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dilation_(this->template GetRepeatedArgument<int>("dilations")),
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stride_(this->template GetRepeatedArgument<int>("strides")),
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pads_(this->template GetRepeatedArgument<int>("pads")),
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float16_compute_(
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this->template GetSingleArgument<bool>("float16_compute", false)),
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group_(this->template GetSingleArgument<int>("group", 1)),
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order_(StringToStorageOrder(
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this->template GetSingleArgument<string>("order", "NCHW"))),
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shared_buffer_(
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this->template GetSingleArgument<int>("shared_buffer", 0)),
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ws_(ws) {
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// For the padding, they should either be the legacy padding strategy
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// (VALID or SAME), or an explicit, non-negative value.
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if (legacy_pad_ == LegacyPadding::VALID ||
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legacy_pad_ == LegacyPadding::SAME) {
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CAFFE_ENFORCE(
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!OperatorBase::HasArgument("pads"),
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"If you use legacy padding VALID or SAME, you should not specify "
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"any specific padding values.");
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}
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// Get old arguments values.
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if (OperatorBase::HasArgument("kernel")) {
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kernel_.resize(2, this->template GetSingleArgument<int>("kernel", 0));
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} else if (
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OperatorBase::HasArgument("kernel_h") &&
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OperatorBase::HasArgument("kernel_w")) {
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kernel_.push_back(this->template GetSingleArgument<int>("kernel_h", 0));
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kernel_.push_back(this->template GetSingleArgument<int>("kernel_w", 0));
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}
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if (OperatorBase::HasArgument("stride")) {
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stride_.resize(2, this->template GetSingleArgument<int>("stride", 0));
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} else if (
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OperatorBase::HasArgument("stride_h") &&
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OperatorBase::HasArgument("stride_w")) {
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stride_.push_back(this->template GetSingleArgument<int>("stride_h", 0));
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stride_.push_back(this->template GetSingleArgument<int>("stride_w", 0));
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}
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if (OperatorBase::HasArgument("dilation")) {
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dilation_.resize(2, this->template GetSingleArgument<int>("dilation", 0));
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} else if (
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OperatorBase::HasArgument("dilation_h") &&
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OperatorBase::HasArgument("dilation_w")) {
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dilation_.push_back(
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this->template GetSingleArgument<int>("dilation_h", 0));
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dilation_.push_back(
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this->template GetSingleArgument<int>("dilation_w", 0));
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}
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if (OperatorBase::HasArgument("pad")) {
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CAFFE_ENFORCE(
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legacy_pad_ != LegacyPadding::VALID &&
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legacy_pad_ != LegacyPadding::SAME,
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"If you use legacy padding VALID or SAME, you should not specify "
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"any specific padding values.");
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pads_.resize(4, this->template GetSingleArgument<int>("pad", 0));
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} else if (
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OperatorBase::HasArgument("pad_t") &&
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OperatorBase::HasArgument("pad_l") &&
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OperatorBase::HasArgument("pad_b") &&
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OperatorBase::HasArgument("pad_r")) {
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CAFFE_ENFORCE(
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legacy_pad_ != LegacyPadding::VALID &&
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legacy_pad_ != LegacyPadding::SAME,
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"If you use legacy padding VALID or SAME, you should not specify "
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"any specific padding values.");
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pads_.push_back(this->template GetSingleArgument<int>("pad_t", 0));
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pads_.push_back(this->template GetSingleArgument<int>("pad_l", 0));
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pads_.push_back(this->template GetSingleArgument<int>("pad_b", 0));
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pads_.push_back(this->template GetSingleArgument<int>("pad_r", 0));
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}
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// Fill default values.
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if (kernel_.size() == 0) {
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kernel_.assign({0, 0});
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}
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if (stride_.size() == 0) {
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stride_.resize(kernel_.size(), 1);
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}
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if (pads_.size() == 0) {
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pads_.resize(kernel_.size() * 2, 0);
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}
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if (dilation_.size() == 0) {
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dilation_.resize(kernel_.size(), 1);
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}
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CAFFE_ENFORCE_EQ(stride_.size(), kernel_.size());
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CAFFE_ENFORCE_EQ(dilation_.size(), kernel_.size());
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if (legacy_pad_ != LegacyPadding::VALID &&
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legacy_pad_ != LegacyPadding::SAME) {
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CAFFE_ENFORCE_EQ(pads_.size(), 2 * kernel_.size());
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}
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if (global_pooling_) {
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for (size_t dim = 0; dim < kernel_.size(); ++dim) {
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CAFFE_ENFORCE(
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pads_[2 * dim] == 0 && pads_[2 * dim + 1] == 0 &&
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dilation_[dim] == 1 && stride_[dim] == 1,
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"If global_pooling is set pad, dilation and stride shouldn't be set.");
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}
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}
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// Check kernel only if we are doing conv or pooling. The reason is that a
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// few other ops, like PadImage, are also using this base class. We really
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// need to clean this up.
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if (operator_def.name().find("Conv") == 0 ||
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operator_def.name().find("Pool") != std::string::npos) {
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for (size_t dim = 0; dim < kernel_.size(); ++dim) {
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CAFFE_ENFORCE_GE(pads_[dim], 0);
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CAFFE_ENFORCE_GE(pads_[kernel_.size() + dim], 0);
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CAFFE_ENFORCE(
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kernel_[dim],
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"If you are doing convolution or pooling, you will need to set "
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"explicitly the kernel size.");
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}
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}
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for (size_t dim = 0; dim < kernel_.size(); ++dim) {
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CAFFE_ENFORCE_GE(kernel_[dim], 0);
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CAFFE_ENFORCE_GE(dilation_[dim], 0);
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CAFFE_ENFORCE_GE(stride_[dim], 0);
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}
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}
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// Returns the input image dimensions for the current storage order type.
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vector<int> GetDims(const Tensor& input) {
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vector<int> dims;
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switch (order_) {
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case StorageOrder::NCHW:
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dims.assign(input.sizes().begin() + 2, input.sizes().end());
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break;
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case StorageOrder::NHWC:
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dims.assign(input.sizes().begin() + 1, input.sizes().end() - 1);
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break;
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default:
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CAFFE_THROW("Unknown storage order : ", order_);
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}
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return dims;
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}
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// Returns the size of the input image for the current storage type.
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int GetDimsSize(const Tensor& input) {
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int size = 0;
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switch (order_) {
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case StorageOrder::NCHW:
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size = std::accumulate(
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input.sizes().begin() + 2,
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input.sizes().end(),
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1,
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std::multiplies<int>());
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break;
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case StorageOrder::NHWC:
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size = std::accumulate(
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input.sizes().begin() + 1,
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input.sizes().end() - 1,
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1,
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std::multiplies<int>());
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break;
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default:
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CAFFE_THROW("Unknown storage order : ", order_);
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}
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return size;
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}
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// Gets the output size. The output channel is manually provided since
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// it may not be identical to the input channels.
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// This function can be used in the forward functions to obtain the output
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// sizes.
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// Note(jiayq): the templatization of this function is mainly to help
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// implementations that do not use first-class Tensor objects, such as the
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// MKL operator. One can still call this function with dummy
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// Tensor objects in order to obtain the sizes.
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std::vector<int64_t> GetOutputSize(const Tensor& input, int output_channel) {
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CAFFE_ENFORCE_GE(input.dim(), 2);
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const int inner_size = input.size_from_dim(1);
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CAFFE_ENFORCE_GT(inner_size, 0);
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std::vector<int64_t> output_dims;
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InferOutputSize64(
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input.sizes(),
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output_channel,
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order_,
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global_pooling_,
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legacy_pad_,
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dilation_,
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stride_,
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&kernel_,
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&pads_,
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&output_dims);
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return output_dims;
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}
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void SetOutputSize(const Tensor& input, Tensor* output, int output_channel) {
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const int inner_size = input.size_from_dim(1);
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CAFFE_ENFORCE_GT(inner_size, 0);
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std::vector<int> output_dims;
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InferOutputSize(
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input.sizes(),
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output_channel,
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order_,
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global_pooling_,
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legacy_pad_,
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dilation_,
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stride_,
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&kernel_,
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&pads_,
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&output_dims);
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output->Resize(output_dims);
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}
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// Helper function that is also called from OperatorSchema. Modified
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// kernel parameters and output output_dims and channel_first.
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static void InferOutputSize(
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const at::IntArrayRef& input_dims,
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const int output_channel,
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const StorageOrder order,
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const bool global_pooling,
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const LegacyPadding legacy_pad,
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const std::vector<int>& dilation,
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const std::vector<int>& stride,
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std::vector<int>* kernel,
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std::vector<int>* pads,
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std::vector<int>* output_dims) {
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CAFFE_ENFORCE_NE(order, StorageOrder::UNKNOWN);
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const int ndim = input_dims.size() - 2;
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output_dims->resize(ndim + 2);
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output_dims->front() = input_dims.front();
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if (order == StorageOrder::NCHW) {
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output_dims->at(1) = output_channel;
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} else {
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output_dims->back() = output_channel;
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}
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const int offset = order == StorageOrder::NCHW ? 2 : 1;
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if (global_pooling) {
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std::copy_n(input_dims.cbegin() + offset, ndim, kernel->begin());
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std::fill_n(output_dims->begin() + offset, ndim, 1LL);
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} else {
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for (int i = 0; i < ndim; ++i) {
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ComputeSizeAndPad(
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input_dims[i + offset],
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stride[i],
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kernel->at(i),
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dilation[i],
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legacy_pad,
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&pads->at(i),
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&pads->at(i + ndim),
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&output_dims->at(i + offset));
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}
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}
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}
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static void InferOutputSize64(
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const at::IntArrayRef& input_dims,
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const int output_channel,
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const StorageOrder order,
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const bool global_pooling,
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const LegacyPadding legacy_pad,
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const std::vector<int>& dilation,
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const std::vector<int>& stride,
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std::vector<int>* kernel,
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std::vector<int>* pads,
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std::vector<int64_t>* output_dims) {
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CAFFE_ENFORCE_NE(order, StorageOrder::UNKNOWN);
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const int ndim = input_dims.size() - 2;
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output_dims->resize(ndim + 2);
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output_dims->front() = input_dims.front();
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if (order == StorageOrder::NCHW) {
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output_dims->at(1) = output_channel;
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} else {
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output_dims->back() = output_channel;
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}
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const int offset = order == StorageOrder::NCHW ? 2 : 1;
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if (global_pooling) {
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std::copy_n(input_dims.cbegin() + offset, ndim, kernel->begin());
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std::fill_n(output_dims->begin() + offset, ndim, 1LL);
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} else {
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for (int i = 0; i < ndim; ++i) {
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ComputeSizeAndPad64(
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input_dims[i + offset],
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stride[i],
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kernel->at(i),
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dilation[i],
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legacy_pad,
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&pads->at(i),
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&pads->at(i + ndim),
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&output_dims->at(i + offset));
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}
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}
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}
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// ComputePads could be used in backward functions to figure out the padding
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// values for the given input.
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void ComputePads(const vector<int>& dims) {
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if (global_pooling_) {
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kernel_ = dims;
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} else if (legacy_pad_ != LegacyPadding::NOTSET) {
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int output_unused;
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for (int dim = 0; dim < dims.size(); ++dim) {
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ComputeSizeAndPad(
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dims[dim],
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stride_[dim],
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kernel_[dim],
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dilation_[dim],
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legacy_pad_,
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&pads_[dim],
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&pads_[dims.size() + dim],
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&output_unused);
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}
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}
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}
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bool HasPad() const {
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if (kernel_.size() == 2) {
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return pad_t() > 0 || pad_b() > 0 || pad_l() > 0 || pad_r() > 0;
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}
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return std::any_of(
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pads_.cbegin(), pads_.cend(), [](const int x) { return x > 0; });
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}
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bool HasStride() const {
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if (kernel_.size() == 2) {
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return stride_h() > 1 || stride_w() > 1;
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}
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return std::any_of(
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stride_.cbegin(), stride_.cend(), [](const int x) { return x > 1; });
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}
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void SetDeviceTensor(const std::vector<int>& data, Tensor* tensor) {
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bool reset_tensor_device_ = false;
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if (tensor->numel() != data.size()) {
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tensor->Resize(data.size());
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reset_tensor_device_ = true;
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} else {
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const int* tensor_data = tensor->template data<int>();
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for (int d_i = 0; d_i < data.size(); ++d_i) {
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if (tensor_data[d_i] != data[d_i]) {
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reset_tensor_device_ = true;
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break;
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}
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}
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}
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if (reset_tensor_device_) {
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context_.template Copy<int, CPUContext, Context>(
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data.size(), data.data(), tensor->template mutable_data<int>());
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}
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}
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template <typename T>
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void SetBiasMultiplier(const int size, Tensor* bias_multiplier_) {
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if (bias_multiplier_->numel() != size) {
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// If the helper bias multiplier is not image size, reshape and fill it
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// with one.
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bias_multiplier_->Resize(std::vector<int64_t>{size});
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math::Set<T, Context>(
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size,
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static_cast<T>(1),
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bias_multiplier_->template mutable_data<T>(),
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&context_);
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}
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}
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bool RunOnDevice() override {
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if (!global_pooling_) {
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for (size_t dim = 0; dim < kernel_.size(); ++dim) {
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CAFFE_ENFORCE_GT(kernel_[dim], 0);
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}
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}
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switch (order_) {
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case StorageOrder::NHWC:
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// VLOG(2) << "Running NHWC";
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return RunOnDeviceWithOrderNHWC();
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case StorageOrder::NCHW:
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// VLOG(2) << "Running NCHW";
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return RunOnDeviceWithOrderNCHW();
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default:
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CAFFE_THROW("Unknown Storage order: ", order_);
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}
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}
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// The actual function that does the computation, if the different
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// storage order leads to different implementations.
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virtual bool RunOnDeviceWithOrderNHWC() {
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CAFFE_NOT_IMPLEMENTED;
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}
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virtual bool RunOnDeviceWithOrderNCHW() {
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CAFFE_NOT_IMPLEMENTED;
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}
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static struct OpSchema::Cost CostInferenceForConv(
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const OperatorDef& def,
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const vector<TensorShape>& inputs) {
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CAFFE_ENFORCE_GE(inputs.size(), 2, "Conv requires at least 2 inputs");
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struct OpSchema::Cost c;
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const TensorShape X = inputs[0];
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const TensorShape W = inputs[1];
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const TensorShape Y = TensorInferenceForConv(def, inputs)[0];
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ArgumentHelper helper(def);
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const auto order =
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StringToStorageOrder(helper.GetSingleArgument<string>("order", "NCHW"));
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uint64_t N;
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uint64_t Y_h;
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uint64_t Y_w = 1;
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uint64_t Y_t = 1;
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uint64_t kernel_h;
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uint64_t kernel_w = 1;
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uint64_t kernel_t = 1;
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uint64_t in_channels;
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uint64_t out_channels;
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if (X.dims_size() == 0 || W.dims_size() == 0) {
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return c;
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}
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N = X.dims(0);
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if (X.dims_size() == 5) {
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// 3D convolution
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if (order == StorageOrder::NHWC) {
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Y_t = Y.dims(1);
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Y_h = Y.dims(2);
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Y_w = Y.dims(3);
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kernel_t = W.dims(1);
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kernel_h = W.dims(2);
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kernel_w = W.dims(3);
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in_channels = W.dims(4);
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out_channels = W.dims(0);
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} else {
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Y_t = Y.dims(2);
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Y_h = Y.dims(3);
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Y_w = Y.dims(4);
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kernel_t = W.dims(2);
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kernel_h = W.dims(3);
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kernel_w = W.dims(4);
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in_channels = W.dims(1);
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out_channels = W.dims(0);
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}
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} else if (X.dims_size() == 4) {
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// 2D convolution
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CAFFE_ENFORCE_EQ(W.dims_size(), 4, "Conv2D should have 4D filter tensor");
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if (order == StorageOrder::NHWC) {
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Y_h = Y.dims(1);
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Y_w = Y.dims(2);
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kernel_h = W.dims(1);
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kernel_w = W.dims(2);
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in_channels = W.dims(3);
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out_channels = W.dims(0);
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} else {
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Y_h = Y.dims(2);
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Y_w = Y.dims(3);
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kernel_h = W.dims(2);
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kernel_w = W.dims(3);
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in_channels = W.dims(1);
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out_channels = W.dims(0);
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}
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} else {
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// 1D convolution
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CAFFE_ENFORCE_EQ(W.dims_size(), 3, "Conv1D should have 3D filter tensor");
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if (order == StorageOrder::NHWC) {
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Y_h = Y.dims(1);
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kernel_h = W.dims(1);
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in_channels = W.dims(2);
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out_channels = W.dims(0);
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} else {
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Y_h = Y.dims(2);
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kernel_h = W.dims(2);
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in_channels = W.dims(1);
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out_channels = W.dims(0);
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}
|
}
|
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uint64_t nElemX = nElemFromDim(X);
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uint64_t nElemW = nElemFromDim(W);
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uint64_t nElemBias = inputs.size() > 2 ? nElemFromDim(inputs[2]) : 0;
|
|
// grouping is NOT properly handled yet
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c.flops = N * Y_t * Y_h * Y_w * kernel_t * kernel_w * kernel_h *
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in_channels * out_channels * 2;
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c.bytes_read = (nElemX + nElemW + nElemBias) * sizeof(X.data_type());
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c.bytes_written =
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N * out_channels * Y_t * Y_h * Y_w * sizeof(Y.data_type());
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c.params_bytes = out_channels * in_channels * kernel_t * kernel_h *
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kernel_w * sizeof(W.data_type());
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return c;
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}
|
|
static vector<TensorShape> TensorInferenceForSchema(
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const OperatorDef& def,
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const vector<TensorShape>& in,
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int output_channel) {
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ArgumentHelper helper(def);
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CAFFE_ENFORCE_GT(in.size(), 0);
|
CAFFE_ENFORCE_GT(in[0].dims_size(), 0);
|
vector<int> pads = helper.GetRepeatedArgument<int>("pads");
|
vector<int> kernel = helper.GetRepeatedArgument<int>("kernels");
|
vector<int> strides = helper.GetRepeatedArgument<int>("strides");
|
vector<int> dilations = helper.GetRepeatedArgument<int>("dilation");
|
if (helper.HasArgument("pad")) {
|
pads.resize(4, helper.GetSingleArgument<int>("pad", 0));
|
} else if (
|
helper.HasArgument("pad_t") && helper.HasArgument("pad_l") &&
|
helper.HasArgument("pad_b") && helper.HasArgument("pad_r")) {
|
pads.push_back(helper.GetSingleArgument<int>("pad_t", 0));
|
pads.push_back(helper.GetSingleArgument<int>("pad_l", 0));
|
pads.push_back(helper.GetSingleArgument<int>("pad_b", 0));
|
pads.push_back(helper.GetSingleArgument<int>("pad_r", 0));
|
}
|
|
if (helper.HasArgument("kernel")) {
|
kernel.resize(2, helper.GetSingleArgument<int>("kernel", 1));
|
} else if (
|
helper.HasArgument("kernel_h") && helper.HasArgument("kernel_w")) {
|
kernel.push_back(helper.GetSingleArgument<int>("kernel_h", 1));
|
kernel.push_back(helper.GetSingleArgument<int>("kernel_w", 1));
|
}
|
|
if (helper.HasArgument("stride")) {
|
strides.resize(2, helper.GetSingleArgument<int>("stride", 1));
|
} else if (
|
helper.HasArgument("stride_h") && helper.HasArgument("stride_w")) {
|
strides.push_back(helper.GetSingleArgument<int>("stride_h", 1));
|
strides.push_back(helper.GetSingleArgument<int>("stride_w", 1));
|
}
|
|
if (helper.HasArgument("dilation")) {
|
strides.resize(2, helper.GetSingleArgument<int>("dilation", 1));
|
} else if (
|
helper.HasArgument("dilation_h") && helper.HasArgument("dilation_w")) {
|
strides.push_back(helper.GetSingleArgument<int>("dilation_h", 1));
|
strides.push_back(helper.GetSingleArgument<int>("dilation_w", 1));
|
}
|
|
auto check_and_set_default_value =
|
[](vector<int>& vec, int size, int value) {
|
if (vec.size() == 0) {
|
vec.resize(size, value);
|
}
|
};
|
|
check_and_set_default_value(kernel, 2, 1);
|
check_and_set_default_value(strides, kernel.size(), 1);
|
check_and_set_default_value(pads, kernel.size() * 2, 0);
|
check_and_set_default_value(dilations, kernel.size(), 1);
|
|
std::vector<int> output_dims;
|
ConvPoolOpBase<CPUContext>::InferOutputSize(
|
GetDimsVector(in[0]),
|
output_channel,
|
StringToStorageOrder(helper.GetSingleArgument<string>("order", "NCHW")),
|
helper.GetSingleArgument<int>("global_pooling", 0),
|
static_cast<LegacyPadding>(
|
helper.GetSingleArgument<int>("legacy_pad", LegacyPadding::NOTSET)),
|
dilations,
|
strides,
|
&kernel,
|
&pads,
|
&output_dims);
|
return {CreateTensorShape(output_dims, TensorProto::FLOAT)};
|
}
|
|
static std::vector<TensorShape> TensorInferenceForConv(
|
const OperatorDef& def,
|
const std::vector<TensorShape>& in) {
|
if (in[0].unknown_shape()) {
|
std::vector<TensorShape> out(1);
|
out[0].set_unknown_shape(true);
|
return out;
|
}
|
return TensorInferenceForSchema(def, in, in[1].dims(0));
|
}
|
|
static std::vector<TensorShape> TensorInferenceForPool(
|
const OperatorDef& def,
|
const std::vector<TensorShape>& in) {
|
if (in[0].unknown_shape()) {
|
std::vector<TensorShape> out(1);
|
out[0].set_unknown_shape(true);
|
return out;
|
}
|
ArgumentHelper helper(def);
|
auto order =
|
StringToStorageOrder(helper.GetSingleArgument<string>("order", "NCHW"));
|
int num_channels =
|
(order == StorageOrder::NCHW ? in[0].dims(1) : in[0].dims(3));
|
return TensorInferenceForSchema(def, in, num_channels);
|
}
|
|
static std::vector<TensorShape> TensorInferenceForLC(
|
const OperatorDef& def,
|
const std::vector<TensorShape>& in) {
|
if (in[0].unknown_shape()) {
|
std::vector<TensorShape> out(1);
|
out[0].set_unknown_shape(true);
|
return out;
|
}
|
const int img_ndim = in[0].dims_size() - 2;
|
return TensorInferenceForSchema(def, in, in[1].dims(img_ndim));
|
}
|
|
virtual ~ConvPoolOpBase() {}
|
|
protected:
|
LegacyPadding legacy_pad_;
|
bool global_pooling_;
|
vector<int> kernel_;
|
vector<int> dilation_;
|
vector<int> stride_;
|
vector<int> pads_;
|
|
bool float16_compute_;
|
|
int group_;
|
StorageOrder order_;
|
bool shared_buffer_;
|
Workspace* ws_;
|
|
static inline void ComputeSizeAndPad(
|
const int in_size,
|
const int stride,
|
const int kernel,
|
const int dilation,
|
LegacyPadding legacy_pad,
|
int* pad_head,
|
int* pad_tail,
|
int* out_size) {
|
const int dkernel = dilation * (kernel - 1) + 1;
|
switch (legacy_pad) {
|
case LegacyPadding::NOTSET:
|
// We will just use the direct padding head and tail values, but we
|
// will verify that they are non-negative.
|
CAFFE_ENFORCE_GE(in_size + *pad_head + *pad_tail, dkernel);
|
*out_size = static_cast<int>(
|
static_cast<float>(in_size + *pad_head + *pad_tail - dkernel) /
|
stride +
|
1);
|
break;
|
case LegacyPadding::VALID:
|
*pad_head = 0;
|
*pad_tail = 0;
|
*out_size = (in_size - dkernel) / stride + 1;
|
break;
|
case LegacyPadding::SAME: {
|
CAFFE_ENFORCE(
|
1 == dilation, "Dilation not supported for legacy padding.");
|
int legacy_target_size = (in_size + stride - 1) / stride;
|
int pad_needed = (legacy_target_size - 1) * stride + kernel - in_size;
|
if (CAFFE2_PAD_HEAD_MORE) {
|
*pad_head = (pad_needed + 1) / 2;
|
} else {
|
*pad_head = pad_needed / 2;
|
}
|
*pad_tail = pad_needed - *pad_head;
|
*out_size = (in_size + pad_needed - dkernel) / stride + 1;
|
break;
|
}
|
case LegacyPadding::CAFFE_LEGACY_POOLING:
|
// This is in order to adapt Caffe's pooling padding case. In this case,
|
// we will only use pad_head and will compute pad_tail to match the
|
// old caffe pooling strategy. Also see caffe2_legacy.proto for more
|
// details.
|
CAFFE_ENFORCE_GE(*pad_head, 0);
|
// Here, notice that caffe casts UP while caffe2 casts DOWN for the
|
// output size computation.
|
*out_size = std::ceil(
|
static_cast<float>(in_size + *pad_head * 2 - kernel) / stride + 1);
|
// If we have padding, caffe also ensures that the last pooling starts
|
// strictly inside the image (instead of at the padding); otherwise clip
|
// the last.
|
if (*pad_head > 0 && (*out_size - 1) * stride >= in_size + *pad_head) {
|
--*out_size;
|
}
|
// Now, compare the output size with the standard Caffe2 output size.
|
// The
|
// caffe2 standard output size should always be no larger than the
|
// output
|
// size of caffe.
|
int standard_out_size = static_cast<int>(
|
static_cast<float>(in_size + *pad_head * 2 - kernel) / stride + 1);
|
CAFFE_ENFORCE_GE(
|
*out_size,
|
standard_out_size,
|
"This should never happen. If this happens, double check the logic "
|
"above.");
|
if (*out_size > standard_out_size) {
|
LOG(WARNING)
|
<< "You are hitting a case where Caffe's legacy padding calculation "
|
"is hit. This leads to inefficient and sometimes incorrect "
|
"results. We are keeping this behavior for backward compatibility"
|
", but you are strongly recommended to move away from it.";
|
}
|
*pad_tail = *pad_head + stride * (*out_size - standard_out_size);
|
break;
|
}
|
}
|
|
static inline void ComputeSizeAndPad64(
|
const int in_size,
|
const int stride,
|
const int kernel,
|
const int dilation,
|
LegacyPadding legacy_pad,
|
int* pad_head,
|
int* pad_tail,
|
int64_t* out_size) {
|
const int dkernel = dilation * (kernel - 1) + 1;
|
switch (legacy_pad) {
|
case LegacyPadding::NOTSET:
|
// We will just use the direct padding head and tail values, but we
|
// will verify that they are non-negative.
|
CAFFE_ENFORCE_GE(in_size + *pad_head + *pad_tail, dkernel);
|
*out_size = static_cast<int>(
|
static_cast<float>(in_size + *pad_head + *pad_tail - dkernel) /
|
stride +
|
1);
|
break;
|
case LegacyPadding::VALID:
|
*pad_head = 0;
|
*pad_tail = 0;
|
*out_size = (in_size - dkernel) / stride + 1;
|
break;
|
case LegacyPadding::SAME: {
|
CAFFE_ENFORCE(
|
1 == dilation, "Dilation not supported for legacy padding.");
|
int legacy_target_size = (in_size + stride - 1) / stride;
|
int pad_needed = (legacy_target_size - 1) * stride + kernel - in_size;
|
if (CAFFE2_PAD_HEAD_MORE) {
|
*pad_head = (pad_needed + 1) / 2;
|
} else {
|
*pad_head = pad_needed / 2;
|
}
|
*pad_tail = pad_needed - *pad_head;
|
*out_size = (in_size + pad_needed - dkernel) / stride + 1;
|
break;
|
}
|
case LegacyPadding::CAFFE_LEGACY_POOLING:
|
// This is in order to adapt Caffe's pooling padding case. In this case,
|
// we will only use pad_head and will compute pad_tail to match the
|
// old caffe pooling strategy. Also see caffe2_legacy.proto for more
|
// details.
|
CAFFE_ENFORCE_GE(*pad_head, 0);
|
// Here, notice that caffe casts UP while caffe2 casts DOWN for the
|
// output size computation.
|
*out_size = std::ceil(
|
static_cast<float>(in_size + *pad_head * 2 - kernel) / stride + 1);
|
// If we have padding, caffe also ensures that the last pooling starts
|
// strictly inside the image (instead of at the padding); otherwise clip
|
// the last.
|
if (*pad_head > 0 && (*out_size - 1) * stride >= in_size + *pad_head) {
|
--*out_size;
|
}
|
// Now, compare the output size with the standard Caffe2 output size.
|
// The
|
// caffe2 standard output size should always be no larger than the
|
// output
|
// size of caffe.
|
int standard_out_size = static_cast<int>(
|
static_cast<float>(in_size + *pad_head * 2 - kernel) / stride + 1);
|
CAFFE_ENFORCE_GE(
|
*out_size,
|
standard_out_size,
|
"This should never happen. If this happens, double check the logic "
|
"above.");
|
if (*out_size > standard_out_size) {
|
LOG(WARNING)
|
<< "You are hitting a case where Caffe's legacy padding calculation "
|
"is hit. This leads to inefficient and sometimes incorrect "
|
"results. We are keeping this behavior for backward compatibility"
|
", but you are strongly recommended to move away from it.";
|
}
|
*pad_tail = *pad_head + stride * (*out_size - standard_out_size);
|
break;
|
}
|
}
|
|
// Accessors for 2D conv params.
|
|
inline int pad_t() const {
|
return pads_[0];
|
}
|
|
inline int pad_l() const {
|
return pads_[1];
|
}
|
|
inline int pad_b() const {
|
return pads_[2];
|
}
|
|
inline int pad_r() const {
|
return pads_[3];
|
}
|
|
inline int kernel_h() const {
|
return kernel_[0];
|
}
|
|
inline int kernel_w() const {
|
return kernel_[1];
|
}
|
|
inline int stride_h() const {
|
return stride_[0];
|
}
|
|
inline int stride_w() const {
|
return stride_[1];
|
}
|
|
inline int dilation_h() const {
|
return dilation_[0];
|
}
|
|
inline int dilation_w() const {
|
return dilation_[1];
|
}
|
|
private:
|
inline void AllocateAndCopy(const vector<int>& vec, Tensor& tensor) {
|
tensor.Resize(vec.size());
|
context_.template CopyFromCPU<int>(
|
vec.size(), vec.data(), tensor.template mutable_data<int>());
|
}
|
|
#define USE_CONV_POOL_BASE_FUNCTIONS(Context) \
|
USE_OPERATOR_FUNCTIONS(Context); \
|
using ConvPoolOpBase<Context>::pads_; \
|
using ConvPoolOpBase<Context>::pad_t; \
|
using ConvPoolOpBase<Context>::pad_l; \
|
using ConvPoolOpBase<Context>::pad_b; \
|
using ConvPoolOpBase<Context>::pad_r; \
|
using ConvPoolOpBase<Context>::legacy_pad_; \
|
using ConvPoolOpBase<Context>::global_pooling_; \
|
using ConvPoolOpBase<Context>::kernel_; \
|
using ConvPoolOpBase<Context>::kernel_h; \
|
using ConvPoolOpBase<Context>::kernel_w; \
|
using ConvPoolOpBase<Context>::dilation_; \
|
using ConvPoolOpBase<Context>::dilation_h; \
|
using ConvPoolOpBase<Context>::dilation_w; \
|
using ConvPoolOpBase<Context>::stride_; \
|
using ConvPoolOpBase<Context>::stride_h; \
|
using ConvPoolOpBase<Context>::stride_w; \
|
using ConvPoolOpBase<Context>::group_; \
|
using ConvPoolOpBase<Context>::order_; \
|
using ConvPoolOpBase<Context>::shared_buffer_; \
|
using ConvPoolOpBase<Context>::GetDims; \
|
using ConvPoolOpBase<Context>::GetDimsSize; \
|
using ConvPoolOpBase<Context>::SetDeviceTensor; \
|
using ConvPoolOpBase<Context>::HasPad; \
|
using ConvPoolOpBase<Context>::HasStride; \
|
using ConvPoolOpBase<Context>::ws_
|
};
|
|
} // namespace caffe2
|
|
#endif // CAFFE2_OPERATORS_CONV_POOL_OP_BASE_H_
|
